Some RapidIO II IP Core Port 0 Capture CSRs Do Not Update Correctly - Some RapidIO II IP Core Port 0 Capture CSRs Do Not Update Correctly Description The RapidIO II IP core Port 0 Attributes Capture CSR (offset 0x348) and Port 0 Packet/Control Symbol Captures CSR s (offsets 0x34C, 0x350, 0x354, and 0x358) do not update correctly. As of the RapidIO II IP core version 14.0, this issue is fixed with the exception of back to back control symbols. In the case of back to back control symbols only, the RapidIO II IP core does not update these registers correctly. However, in all other cases, the RapidIO II IP core now updates these registers correctly. Resolution This issue has no workaround. This issue will be fixed for back to back control symbols in a future version of the RapidIO II MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']