When using the IOPLL clock switchover feature in Intel Agilex® devices, must inclk1 be in the same I/O bank as the IOPLL? - When using the IOPLL clock switchover feature in Intel Agilex® devices, must inclk1 be in the same I/O bank as the IOPLL? Description Yes, when using the IOPLL clock switchover feature in Intel Agilex® 7 devices, the secondary inclk1 input can only be sourced from dedicated clock inputs that are in the same I/O bank as the IOPLL. This restriction does not apply to inclk0 - only inclk1 . Resolution The Intel Agilex® 7 FPGA Clocking and PLL User Guide will be updated in a future release to include this information. Custom Fields values: ['novalue'] Troubleshooting 18018036115, 14015361503 False ['novalue'] ['novalue'] novalue novalue ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']