Missing gxb_powerdown and pll_powerdown Input Signals in Qsys-Generated IP Compiler for PCI Express Variations - Missing gxb_powerdown and pll_powerdown Input Signals in Qsys-Generated IP Compiler for PCI Express Variations Description The IP Compiler for PCI Express input signals gxb_powerdown and pll_powerdown reset the transceiver. However, these signals are not available by default in Qsys-generated IP Compiler for PCI Express variations. This issue affects all IP Compiler for PCI Express variations generated with Qsys. Resolution To make these input signals available in your IP Compiler for PCI Express, perform the following steps: In Qsys, before you generate your system, export the pipe_ext interface of the IP Compiler for PCI Express. After you generate your system, tie all the pipe_ext interface input signals except the gxb_powerdown and pll_powerdown signals, to zero. Tie the gxb_powerdown signal to zero to enable the RX transceiver offset cancellation process. Drive the pll_powerdown signal with the inverse of the active-low signal pcie_rstn . This issue will be fixed in a future version of the IP Compiler for PCI Express. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']