When using QIC and partial reconfiguration, CRC compatibility checking can fail in the SignalTap II Logic Analyzer - When using QIC and partial reconfiguration, CRC compatibility checking can fail in the SignalTap II Logic Analyzer
Description If your design includes partial reconfiguration, cyclic redundancy check (CRC) compatibility checking can fail in the SignalTap II Logic Analyzer. The failure occurs when you use Quartus II Incremental Compilation (QIC) with the top partition Netlist Type set to Post-Synthesis or Post-Fit , instead of the default Source File setting. These settings cause the CRC compatibility check to fail, preventing you from completing further acquisitions with the SignalTap II Logic Analyzer. Resolution You can delete the /db and /incremental_db folders from your project and recompile your design. Alternatively, you can change the top partition Netlist Type setting to Source File .
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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14.0
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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