# ** Error: _1200mv_85c_slow.vho(13670): Illegal target for signal assignment. # ** Error: _1200mv_85c_slow.vho(13670): (vcom-1136) Unknown identifier "ww_dataout". - # ** Error: _1200mv_85c_slow.vho(13670): Illegal target for signal assignment. # ** Error: _1200mv_85c_slow.vho(13670): (vcom-1136) Unknown identifier "ww_dataout".
Description Due to a problem in the Quartus® II software version 12.0 and later, you may see this error message when compiling your gate-level VHDL netlist in the ModelSim simulator. This error occurs if your design constains an ALTDDIO_OUT instance. Resolution To work around this problem, turn off the Maintain hierarchy option for the EDA Netlist Writer by following the steps below: Select Settings from Quartus II Assignments menu In the Settings dialog box, click on Simulation under EDA Tool Settings in the Category pane Click on More EDA Netlist Writer Settings Turn off the Maintain hierarchy option This problem is scheduled to be fixed in a future release of the Quartus II software.
Custom Fields values:
['novalue']
Troubleshooting
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False
['Simulation']
['FPGA Dev Tools Quartus II Software']
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12.0
['Programmable Logic Devices']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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