Why does the DisplayPort example design fail to generate in Quartus® Prime Pro Edition Software version 26.1? - Why does the DisplayPort example design fail to generate in Quartus® Prime Pro Edition Software version 26.1? Description Due to a problem in Quartus® Prime Pro Edition Software version 26.1, you may see a software build failure when generating the DisplayPort FPGA IP Design Example. In this condition, the generated Nios® V software build fails in debug.c because the load_resolutions() call passes modes_found instead of &modes_found . You may see an error similar to the following: debug.c:486:94: error: passing argument 4 of 'load_resolutions' makes pointer from integer without a cast note: expected 'int *' but argument is of type 'int' Error: Failed to generate example design Resolution To work around this problem, modify debug.c line 486 either in the installed source or in the generated example design, and then regenerate or rebuild the design. Change: load_resolutions (1, mode_param_array, &dsc_data_pps_parameters, modes_found); to: load_resolutions (1, mode_param_array, &dsc_data_pps_parameters, &modes_found); This problem is scheduled to be resolved in a future release of the Quartus® Prime Pro Edition Software. Custom Fields values: Troubleshooting QS-604077 novalue ['Interfaces Audio/Video DisplayPort (Primary)'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 26.1 ['Agilex® 3 FPGAs and SoCs', 'Agilex® 5 FPGAs and SoCs', 'Agilex® 7 FPGAs and SoCs', 'Agilex® 9 FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs']