Why has my VCCL_HPS and VCCIO_HPS power estimates increased in the Quartus® Prime Pro Edition Software v26.1? - Why has my VCCL_HPS and VCCIO_HPS power estimates increased in the Quartus® Prime Pro Edition Software v26.1? Description Starting in the Quartus® Prime Pro Edition Software version 26.1, the Max Power methodology for the HPS CPU subsystem in Agilex® 3 and Agilex® 5 FPGA devices was updated to account for sustained CPU execution. As a result, the power model changed and there is an increase in power estimation for the following power rails when compared to the version 25.3.1 or earlier: VCCL_HPS_CORE0_CORE1, VCCL_HPS_CORE2, and VCCL_HPS_CORE3: up to 514 mW per rail, depending on HPS core utilization and operating frequency, when CPU Application = Max Power VCCIO_HPS: approximately 2 mW Resolution Perform either of the following options :- Migrate your existing design to the Quartus® Prime Pro Edition Software version 26.1 or later for more accurate power estimation of VCCL_HPS (CORE0_CORE1, CORE2, and CORE3) and VCCIO_HPS Manually import existing PTC, PTA, QPTC, or QPTA files generated in version 25.3.1 or earlier into the Quartus® Prime Pro Edition Software version 26.1 Power & Thermal Analyzer and check the updated power estimates. Custom Fields values: ['novalue'] Troubleshooting 15018672427, 15018576049 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3.1 ['Agilex™ 3 FPGAs and SoCs', 'Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']