Why does the O-RAN FPGA IP allow only a single section in one U-plane packet when numprbu = 0? - Why does the O-RAN FPGA IP allow only a single section in one U-plane packet when numprbu = 0?
Description Due to a problem in the O-RAN FPGA IP Webcore version 22.3 and earlier, only a single section is allowed in one U-plane packet when numPrbu = 0. The ORAN FPGA IP does not allow multiple sections with numPrbu = 0 in one U-plane packet. Resolution This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 23.4.
Custom Fields values:
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Errata
15012453958
False
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['FPGA Dev Tools Quartus® Prime Software Pro']
23.4
22.3
['Agilex™ 7 FPGA F-Series', 'Agilex™ 7 FPGA I-Series', 'Arria® 10 FPGAs and SoCs', 'Stratix® 10 DX FPGA', 'Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 TX FPGA']
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['novalue'] - 2025-06-10
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