Address and Command Leveling May Cause Intermittent Calibration Failures in DDR4 External Memory Interfaces - Address and Command Leveling May Cause Intermittent Calibration Failures in DDR4 External Memory Interfaces Description This problem affects DDR4 interfaces on Arria 10 devices. Users of DDR4 memory interfaces may experience intermittent calibration failures as a result of address and command leveling calibration. The symptom of this failure is that some individual memory components may randomly fail read deskew calibration, while the remaining components pass. The specific components that fail vary across resets. Resolution The workaround for this issue is to disable the address and command leveling calibration stage during EMIF IP generation. To disable address and command leveling calibration, select Skip address/command leveling calibration in the Calibration Debug Options section of the Diagnostics tab in the parameter editor. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']