Internal Error: Sub-system: SSC, File: /quartus/tsm/ssc/ssc_timing.cpp, Line: 93 - Internal Error: Sub-system: SSC, File: /quartus/tsm/ssc/ssc_timing.cpp, Line: 93 Description Due to a problem in the Quartus® II software version 13.0 and later, you may see this error during synthesis if the design does not having any timing paths and Timing-Driven Synthesis is enabled. Resolution To workaround this internal error, switch off timing Timing-Driven Synthesis in the Assignments > Settings > Analysis & Synthesis menu. This problem is scheduled to be fixed in a future release of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']