Why I can’t generate RS232 UART IP? - Why I can’t generate RS232 UART IP? Description Due to a problem in the Intel® Quartus® Prime Standard Edition Software v18.1, you may see the below error message when generating the HDL design file for an RS232 UART IP in the IP Parameter Editor. Error: rs232_0: The input clock frequency must be known at generation time. Resolution To work around this problem, add an RS232 UART instance and clock source instance in Platform Designer, and connect the output clock of the clock source to the input clock port of RS232 UART instance. Custom Fields values: ['novalue'] Troubleshooting 1507474758 False ['RS232 UART IP'] ['FPGA Dev Tools Quartus® Prime Software Standard'] novalue 18.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']