Why is the I2C Avalon® Memory Mapped FPGA Host Bridge not writing to On-Chip RAM correctly when using Quartus® Prime Pro Edition Software? - Why is the I2C Avalon® Memory Mapped FPGA Host Bridge not writing to On-Chip RAM correctly when using Quartus® Prime Pro Edition Software? Description When using the Avalon ® Memory Mapped Host Bridge Core for writing into On-Chip RAM, the data might get lost or incorrectly written into memory. This behavior can be observed when writing a stream of 4 bytes to memory in certain memory offsets, in some cases, the fourth byte will not be written or misplaced into the i2c_avalon_master_address signal. This problem occurs because of the following reasons: A mishandling of an illegal byteenable condition being issued, described in the Altera ® FPGA I2C Agent to Avalon Memory Mapped Host Bridge Core > Write Operation documentation. A mishandling of a multiple write burst condition or split write state performed by the Avalon Memory Mapped Host Bridge Core . This problem was found in the Quartus® Prime Pro Edition Software version 19.1 for Linux*. Resolution To overcome the problem, download the Latest Device Firmware for the Quartus® Prime Pro Edition Software version 22.2 from the following knowledge article: https://community.altera.com/kb/knowledge-base/what-is-the-latest-device-firmware-for-the-agilex%c2%ae-fpga-and-stratix%c2%ae10-fpgas/341066 This problem is fixed in the Quartus® Prime Pro Edition Software v22.3 and Quartus® Prime Standard Edition Software v22.1 onwards. Custom Fields values: ['novalue'] Errata 14017057223 False ['I2C Slave To Avalon-MM Master Bridge IP'] ['FPGA Dev Tools Quartus® Prime Software'] 22.3 19.1 ['Agilex™ 7 FPGAs and SoCs', 'Arria® 10 Bare Die', 'Cyclone® Bare Die', 'MAX® CPLDs', 'Stratix® FPGAs'] ['novalue'] ['novalue'] ['novalue']