Can the Programmable Open-Drain Output, Bus-Hold and Pull-Up resistor options be used for SSTL-12, SSTL-125, SSTL-135, and SSTL-15 I/O standards in Intel® Stratix® 10 devices? - Can the Programmable Open-Drain Output, Bus-Hold and Pull-Up resistor options be used for SSTL-12, SSTL-125, SSTL-135, and SSTL-15 I/O standards in Intel® Stratix® 10 devices?
Description No, the Programmable Open-Drain Output, Bus-Hold and Pull-Up resistor options are not supported when using SSTL-12, SSTL-125, SSTL-135 and SSTL-15 I/O standards in Intel® Stratix® 10 devices. However, due to a problem in Intel® Quartus® Prime Pro Edition software version 20.4 and earlier, no error is issued in compilation if the Programmable Open-Drain Output, Bus-Hold and Pull-Up resistor options are set for SSTL-12, SSTL-125, SSTL-135 and SSTL-15 I/O standards in Intel® Stratix® 10 devices. Resolution Do not set the Open-Drain Output, Bus-Hold and Pull-Up resistor options to SSTL-12, SSTL-125, SSTL-135, and SSTL-15 in Intel® Stratix® 10 devices. For detail of programmable IOE features, I/O buffer types, and I/O standards support, refer to Intel® Stratix® 10 General Purpose I/O User Guide. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.1.
Custom Fields values:
['novalue']
Troubleshooting
14013591305
False
['novalue']
['FPGA Dev Tools Quartus® Prime Software Pro']
21.1
20.4
['Stratix® 10 FPGAs and SoCs']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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