Why are pins reported as stuck at 1 when I perform Boundary Scan Testing on SOC Devices? - Why are pins reported as stuck at 1 when I perform Boundary Scan Testing on SOC Devices? Description When performing Boundary Scan Testing on Cyclone® V SOC and Arria® V SOC Hard Processor Systems (HPS), the HPS must be held in reset. Resolution This requirement is scheduled to be included starting with the release 15.1 of the Cyclone® V SOC and Arria® V SOC Handbooks. Custom Fields values: ['novalue'] Troubleshooting n/a False ['novalue'] ['novalue'] novalue novalue ['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']