What is the default Local-to-Memory address mapping in the HPS SDRAM controller? - What is the default Local-to-Memory address mapping in the HPS SDRAM controller? Description By default, the Local-to-Memory Address Mapping option when using the HPS SDRAM controller is CHIP-ROW-BANK-COL. This is the Bank Interleave Without Chip Select Interleave option described in Chapter 4 Functional Description - HPS Memory Controller of the EMIF handbook. Resolution By default, the Local-to-Memory Address Mapping option when using the HPS SDRAM controller is CHIP-ROW-BANK-COL. Custom Fields values: ['novalue'] Troubleshooting 1408190531 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Arria® V FPGAs and SoCs', 'Arria® V GX FPGA', 'Cyclone® V FPGAs and SoCs', 'Cyclone® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']