What is the pull-up resistor guideline for the DDR4 alert_n signal? - What is the pull-up resistor guideline for the DDR4 alert_n signal? Description The recommendation is to start with a 10k ohm pull-up resistor to 1.2V for the DDR4 alert_n signal, and then the resistor can be adjusted to a different value as long as it meets the FPGA I/O buffer VIL and VIH specifications (refer to the FPGA device datasheet under the I/O Standards specification). Perform a board signal integrity simulation to verify the optimal setting. Custom Fields values: ['novalue'] Troubleshooting novalue False ['External Memory Interfaces Arria® 10 FPGA IP', 'External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard'] novalue novalue ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']