How do I reduce the number of “informational” functional simulation messages produced by the Intel® Stratix® 10 transceiver models? - How do I reduce the number of “informational” functional simulation messages produced by the Intel® Stratix® 10 transceiver models? Description During functional simulation of the Intel® Stratix® 10 transceiver, a number of “informational” messages are produced by the model. Resolution To reduce the number of “informational” messages produced by the transceiver simulation model, add the following option to the simulator’s compilation/elaboration line for the transceiver IP’s top-level instance: " define DISABLE_PARAM_INFO" Custom Fields values: ['novalue'] Troubleshooting FB: 506279; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.1 17.1 ['Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']