ALTPLL_RECONFIG megafunctions cannot be simulated with the NativeLink flow - ALTPLL_RECONFIG megafunctions cannot be simulated with the NativeLink flow
Description If you start simulation of a design that contains an ALTPLL_RECONFIG megafunction from the Tools menu of the Quartus II software, the simulation incorrectly reports no toggling of the reconfig and output clock signals. Resolution Instead of running your simulation tool from within the Quartus II software, run simulation from your simulation tool.
Custom Fields values:
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Troubleshooting
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True
['Simulation']
['FPGA Dev Tools Quartus II Software']
12.1
12.0
['Programmable Logic Devices']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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