Hyperflex® Architecture Design: Analyzing Critical Chains - 29 Minutes In the Hyperflex® FPGA Architecture Design: Analyzing Critical Chains course, you will learn what is meant by the term “critical chain” and how it relates to your design performance. You will learn how to read critical chain reports produced by the Quartus® Prime Pro software, reports generated when targeting devices built using the Hyperflex architecture, namely, Agilex™ series and Stratix® 10 FPGAs. By the end of the training, you will also be able to use software tools to correlate critical chains to your FPGA design, and be able to apply some basic solutions to fix the critical chains so as to improve design performance. Course Objectives At course completion, you will be able to: Understand critical chains and how they relate to design performance Analyze critical chain reports to determine the design structure that generated them Locate resources necessary to solve critical chains Skills Required Familiarity with FPGA/CPLD design flow Familiarity with the Quartus Prime Pro development software including Hyper-Retiming and Fast Forward analysis Understanding of the Hyperflex architecture If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OHYPCRCHNS. FPGA_OHYPCRCHNS. <p>Altera Hyperflex FPGA Architecture Design: Analyzing Critical Chains</p>