Why is the Output Enable behavior for BLVDS outputs inverted in Arria V devices? - Why is the Output Enable behavior for BLVDS outputs inverted in Arria V devices? Description Due to a problem with the Quartus® II software version 12.0 and earlier, a BLVDS output made up of two single ended ALTIOBUF megafunctions and the pseudo diff out atom will have inverted OE behaviour when implemented in Arria® V devices. This problem does not affect either RTL or post-fit simulation models. Resolution Instead of instantiating the pseudo diff out atom and single ended buffers, the differential output buffer should be instantiated by creating a differential output with OE variation of the ALTIOBUF megafunction. This problem is fixed in the Quartus II software version 12.0SP1. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 12.0.1 12.0 ['Arria® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']