Why do I see the HPS EMAC hang with RX buffer full on my Cyclone® V SoC design? - Why do I see the HPS EMAC hang with RX buffer full on my Cyclone® V SoC design? Description Due to a problem in the Linux-socfpga kernel version 5.4 and later, the HPS EMAC may hang or stall under some circumstances. This problem is due to an incorrect setting in the Cyclone® V SoC Linux device tree The Shared Enable Override bit must be enabled on the L2C-310 Cache Controller The Read and Write outstanding Transaction Limit should be set to 0xf on the EMAC DMA Resolution To work around this problem, perform the following steps: 1. Ensure the L2C-310 device tree node sets the shared Enable Override bit, by editing arch/arm/boot/dts/socfpga.dtsi L2: cache-controller@fffef000 { compatible = "arm,pl310-cache"; reg = <0xfffef000 0x1000>; interrupts = <0 38 0x04>; cache-unified; cache-level = <2>; arm,tag-latency = <1 1 1>; arm,data-latency = <2 1 1>; prefetch-data = <1>; prefetch-instr = <1>; arm,shared-override; # Check this is present arm,double-linefill = <1>; arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <1>; arm,prefetch-drop = <0>; arm,prefetch-offset = <7>; }; 2. Edit the ethernet node(s) to add a reference(s) for a snps,axi-config, and add nodes for the snps,axi-config in arch/arm/boot/dts/socfpga.dtsi Example for GMAC0: diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index e404220..90a0560 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -560,10 +560,16 @@ reset-names = "stmmaceth"; snps,multicast-filter-bins = <256>; snps,perfect-filter-entries = <128>; + snps,axi-config = <&stmmac_axi_setup_0>; tx-fifo-depth = <4096>; rx-fifo-depth = <4096>; status = "disabled"; }; + + stmmac_axi_setup_0: stmmac-axi-config_0 { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + }; This problem has been fixed beginning with the linux-socfpga-5.10.120-lts and linux-socfpga-5.15.30-lts branches Custom Fields values: ['novalue'] Troubleshooting 18017374379 False ['novalue'] ['novalue'] novalue novalue ['Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']