Why does the Triple-Speed Ethernet Intel® FPGA IP for the Intel Agilex® 7 fail to achieve timestamp accuracy of +/-8ns in 100Mbps mode? - Why does the Triple-Speed Ethernet Intel® FPGA IP for the Intel Agilex® 7 fail to achieve timestamp accuracy of +/-8ns in 100Mbps mode? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.1, the 100Mbps mode of Triple-Speed Ethernet Intel® FPGA IP with "10/100/1000 Ethernet MAC with IEEE 1588v2, 1000BASE-X/SGMII 2XTBI PCS, and Embedded Serial PMA" core variation reports intermittent timestamp accuracy error ranging from 16ns - 64ns. Other data rates are not impacted by this problem. Resolution There is no workaround for this problem in version 23.1. This problem has been fixed in version 23.2 of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15013486781 False ['Triple-Speed Ethernet IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.2 23.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']