Is there a known problem with the Intel® MAX® 10 FPGA On Chip Flash IP for UFM read operations? - Is there a known problem with the Intel® MAX® 10 FPGA On Chip Flash IP for UFM read operations? Description Due to a known problem in the Intel® Quartus® Prime Software, data read failures might occur when using the On Chip Flash IP to read User Flash Memory (UFM) in Intel® MAX® 10 devices. Resolution To work around this, modify the altera_onchip_flash_avmm_data_controller.v file as shown below. This file can be found in the following location <Quartus installation folder>\ip\altera\altera_onchip_flash\altera_onchip_flash\altera_onchip_flash_avmm_data_controller.v Original: assign flash_read_addr = (is_read_busy) ? flash_seq_read_ardin : avmm_addr; Modified: assign flash_read_addr = avmm_addr; // (is_read_busy) ? flash_seq_read_ardin : avmm_addr; This problem will be fixed in a future version of the Intel® Quartus® Prime Software. Custom Fields values: ['novalue'] Troubleshooting 1506793427 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 15.1.1 No plan to fix ['MAX® 10 10 FPGAs'] ['novalue'] ['novalue'] ['novalue']