Is there a known issue in the Quartus Prime software with Analog-to-Digital Converter (ADC) I/O rule checking in MAX 10 devices? - Is there a known issue in the Quartus Prime software with Analog-to-Digital Converter (ADC) I/O rule checking in MAX 10 devices? Description Yes, due to an issue in Quartus® Prime software versions 16.1.2 and earlier, the fitter does not perform the Analog-to-Digital Converter (ADC) I/O Restriction physical rule based checking in MAX® 10 devices. These rules define the number of General Purpose I/Os (GPIO) allowed in a particular bank based on the I/O's drive strength, when using ADCs in the design. These rules are based on noise calculation to analyze accurately the impact of I/O placement on the ADC performance. Workaround This issue is fixed in Quartus Prime software version 17.0 Custom Fields values: ['novalue'] Troubleshooting FB: 428991; False ['Modular ADC core IP', 'Modular Dual ADC core IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.0 15.0 ['MAX® 10 10 FPGAs'] ['novalue'] ['novalue'] ['novalue']