Why is the PCIe Hard IP core not sending out the required flow control (FC) update within 30 us - Why is the PCIe Hard IP core not sending out the required flow control (FC) update within 30 us Description Due to an issue with the Altera® PCI Express® Hard IP, FC update may not happen within the required 30us. This is due to simultaneous FC Updates for different types of transactions being scheduled. This issue causes no system or performance impact. For additional information, please contact mySupport with reference FB148571. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue True ['PCI Express'] ['novalue'] novalue novalue ['Arria® V GZ FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']