Why are state machine nodes from an unrelated clock domain found when using the Simulator Aware Node Finder? - Why are state machine nodes from an unrelated clock domain found when using the Simulator Aware Node Finder? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.1 and earlier, you might see that the state machine nodes from an unrelated clock domain are found when using the Simulator Aware Node Finder of the Signal Tap Logic Analyzer. Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 24.1. Download and install Patch 0.32 from the appropriate link below. Quartus® Prime Pro Edition Software v24.1 Patch 0.32 for Windows (.exe) Quartus® Prime Pro Edition Software v24.1 Patch 0.32 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v24.1 Patch 0.32 (.txt) This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.3. Custom Fields values: ['novalue'] Troubleshooting 15013295631 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.3 24.1 ['Agilex™ 5 FPGAs and SoCs', 'Agilex™ 7 FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']