Why does the Memory Test Fail in the JTAG terminal for Nios® V/m EMIF Data Mover Design Example? - Why does the Memory Test Fail in the JTAG terminal for Nios® V/m EMIF Data Mover Design Example? Description Due to a problem in the Quartus® Prime Pro Edition Software version 22.3, you might see intermittent memory read data mismatches in the JTAG terminal when memory locations are written and read back for the Agilex™ 7 - Nios® V/m EMIF Data Mover Design Example, which is a pre-installed design and delivered with Quartus® Prime Pro Edition Software. This will cause the memory test to fail in random memory locations. Resolution To work around this problem in the Quartus® Prime Pro Edition Software version 22.3 and onwards, re-program the .sof file, download and execute the . elf file to the board. This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 23.3. Custom Fields values: ['novalue'] Troubleshooting 16019204472;14020205770 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 22.3 ['Agilex™ 7 FPGA F-Series'] ['novalue'] ['novalue'] ['Agilex™ 7 FPGA F-Series Dev Kit']