Is it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC - Is it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC Hi, I'm trying to design a video interface by using displayport on Cyclone V SoC device, I referred to the example design located ( C:\intelFPGA\18.1\ip\altera\altera_dp\hw_demo\cv). In this example, a module is used to reconfig the transceiver, in my design, I do not plan to config the link rate during the run, is it possible to skip reconfig module? Thank you very much in advance Jasmine Replies: Re: Is it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC You are welcome ! Replies: Re: Is it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC Thank you very much for the answer. Replies: Re: Is it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC Hi, transceiver reconfig interface is already hard coded as part of the feature in Intel FPGA Display Port IP. It's not something that can be disable. I am sorry but you can't skip it. Thanks. Regards, dlim