Low Latency 10G Ethernet SDC warnings - Low Latency 10G Ethernet SDC warnings When building a design with a uni-directional instance of the 10G LL MAC IP core for the Cyclone 10 GX, I see the following warnings when the SDC file is read. The design is receive only. It appears that these are related to clock crossing logic for the statistics registers that is not suitable in my design as the MAC is in uni-directional mode. However, I cannot be certain and would like some further information. Ignored filter at low_latency_10G_ethernet.sdc(161): intel_10g_mac:i_10g_ll_mac|alt_em10g32:alt_em10g32_0|alt_em10g32unit:alt_em10g32unit_inst|alt_em10g32_creg_top:creg_top_inst|alt_em10g32_clock_crosser:STAT_TX_RX_CLK.clock_crosser_tx_stat_csr_to_tx_clk|altera_std_synchronizer_nocut:synchronizer_nocut_forward_sync|din_s1 could not be matched with a register Ignored set_max_delay at low_latency_10G_ethernet.sdc(161): Argument <to> is an empty collection Ignored set_min_delay at low_latency_10G_ethernet.sdc(161): Argument <to> is an empty collection Ignored filter at low_latency_10G_ethernet.sdc(161): intel_10g_mac:i_10g_ll_mac|alt_em10g32:alt_em10g32_0|alt_em10g32unit:alt_em10g32unit_inst|alt_em10g32_creg_top:creg_top_inst|alt_em10g32_clock_crosser:STAT_TX_RX_CLK.clock_crosser_tx_stat_csr_to_tx_clk|out_data_toggle_flopped could not be matched with a register Ignored set_max_delay at low_latency_10G_ethernet.sdc(161): Argument <from> is an empty collection Ignored set_min_delay at low_latency_10G_ethernet.sdc(161): Argument <from> is an empty collection Replies: Re: Low Latency 10G Ethernet SDC warnings Hi, Then I believe those warnings can be safely ignored. Kindly let me know if needed further support else I shall close the thread. Regards, Pavee Replies: Re: Low Latency 10G Ethernet SDC warnings No errors during compilation, just these warnings and other generic build warnings unrelated to the Ethernet MAC in question. Unfortunately, I am unable to share the design with you. Replies: Re: Low Latency 10G Ethernet SDC warnings Hi, Are you seeing any error in design compilation? If the compilation runs successfully, I believe this can be safely ignore. Unless you're seeing errors. To ease out the debug, you may share with me the design so that I can have look into it too. Regards, Pavee