Why does the Nios® V processor without data cache hang during a flash read operation using the Generic Serial Flash Interface (GSFI) IP HAL driver? - Why does the Nios® V processor without data cache hang during a flash read operation using the Generic Serial Flash Interface (GSFI) IP HAL driver? Description When performing a read operation on a flash device using the GSFI IP HAL driver, a Nios® V processor configured without a data cache may hang and stop functioning correctly due to an issue in the HAL driver. The HAL driver attempts to flush the data cache even when no data cache is present. This incorrect behavior places the processor into a non-deterministic state, which can cause the system to freeze. Resolution To work around this issue, update the following line in the intel_gsfi_read() function. Original: alt_dcache_flush_no_writeback((alt_u8*)qspi_flash_info->data_base + offset, length); Change to: #if ALT_CPU_DCACHE_SIZE > 0 alt_dcache_flush_no_writeback((alt_u8*)qspi_flash_info->data_base + offset, length); #endif This modification ensures that the data cache flush operation is performed only when a data cache is present. This issue will be fixed in a future Quartus® Prime Software release. Custom Fields values: ['novalue'] Troubleshooting 22022016926 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3 ['Agilex™ 5 FPGAs and SoCs', 'Agilex™ 3 FPGAs and SoCs', 'Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGA Direct RF-Series', 'Agilex™ 9 FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']