Why does a flash lock/unlock operation fails to work with the Intel® FPGA Generic Quad SPI Controller II IP? - Why does a flash lock/unlock operation fails to work with the Intel® FPGA Generic Quad SPI Controller II IP? Description You may see a failure to lock/unlock a flash sector while using the 'alt_qspi_controller2_lock' driver API in the Intel® FPGA Quad SPI Controller II Core. This is expected behavior if a Write Enable command is not issued before the lock/unlock instruction is performed. This also impacts the driver API for Intel FPGA Serial Flash Controller II Core. Resolution To perform a successful lock/unlock to a flash sector, ensure the Write Enable instruction is issued prior to using the alt_qspi_controller2_lock or alt_epcq_controller2_lock driver API. This is scheduled to be fixed in a later release of Intel® Quartus® Prime Software. Custom Fields values: ['novalue'] Troubleshooting 1808485146; 1507241166 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.3 18.0.1 ['Arria® V FPGAs and SoCs', 'Cyclone® IV FPGAs', 'Cyclone® V FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 FPGAs', 'MAX® 10 10 FPGAs', 'Stratix® 10 FPGAs and SoCs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']