Agilex 7 F/I Series True Differential Input Termination - Agilex 7 F/I Series True Differential Input Termination
Hi, The Agilex F/I Series GPIO User Guide indicates that if using AC coupling for the true differential inputs you should add external voltage bias circuitry and has no examples of AC coupling without also externally biasing the inputs as shown in snippet below. I would like to confirm whether the Agilex 7 F/I series parts have internal voltage biasing such that if AC coupling, external biasing resistors would not be needed so long as VID (max 600mV, so 1200mV differential pk-pk max) is being met? The IBIS model for the part shows a consistent voltage bias for the inputs that is within the VICM range listed in the Agilex 7 F/I series datasheet (see snippet below) which implies the external biasing is not needed. And the AGILEX FM86/FM76 DEVELOPMENT KIT has some differential inputs that are AC coupled with no external biasing.
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Re: Agilex 7 F/I Series True Differential Input Termination
I am all set here thanks! Sorry for the delay, I marked Frank's reply as the solution.
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Re: Agilex 7 F/I Series True Differential Input Termination
Hi Steve, May I know if you have additional question on this?
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Re: Agilex 7 F/I Series True Differential Input Termination
Thanks Frank. Yes the documentation was not clear to me w/ regard to AC coupling/internal biasing. I was able to get my hands on an Agilex -7 F series board and took some measurements of an AC coupled LVDS input. In this case the internal OCT was not enabled and there was an external 100 ohm termination resistor present on the Agilex side of the series AC coupling caps. With no bias resistors at all on Agilex side of AC coupling caps: A single leg oscillated ~940mV to ~1.17V. So common mode of 1.055V and VID of 0.21V. With a 10k pullup to 1.2V and a 10k pull down to GND on each leg (so should set a 0.6V bias for each leg: Swing of a single leg was from ~480mV to ~720mV. So Common mode of ~0.6V and swing of ~0.24V
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Re: Agilex 7 F/I Series True Differential Input Termination
Hi Steve, reviewing documents and reference design, I agree that GPIO manual, datasheet and development kit schematic are inconsistent in several regards. Looking also at IBIS file, there seems to be a non-linear pull-up feature for TDS input standard which effectively pulls Vicm to about half supply with applied signal. Not sure if IBIS input characteristic is real or roughly simplified. So all-in-all, it seems like development kit implementation is a possible minimal effort termination option. Regards Frank
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Re: Agilex 7 F/I Series True Differential Input Termination
Ok thanks, I agree datasheet doesn't indicate internal bias. I was basing my comments about internal bias based on the IBIS model seeming to have an internal Bias when the tds12_inp input buffer model is used for the Agilex. But that may just be a difference between what can be inferred from the model and what is the case in reality. I appreciate your response.
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Re: Agilex 7 F/I Series True Differential Input Termination
Thanks. this is the dev kit I was referring to. It looks like the following differential pairs into the FPGA fabric are AC coupled with no external bias. There are bias resistors that are DNI'd on schematic/BOM so they are not installed. What do you think about those? If that was done on the dev kit it made me think AC coupling w/ no bias was acceptable. ToD_MASTER_CLK_125M_P/N PTP_SAMPLE_CLK_250M_P/N https://www.intel.com/content/www/us/en/content-details/843994/agilex-7-fpga-f-series-development-kit-production-1-2x-f-tile-revd-dk-dev-agf023fa-development-kit-board-schematic.html
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Re: Agilex 7 F/I Series True Differential Input Termination
Checked dev kit schematic, I believe it implements AC coupling for transceiver but not LVDS.
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Re: Agilex 7 F/I Series True Differential Input Termination
Hi, don't agree with your conclusions. There are no indications of internal bias circuit. Datasheet just specifies required voltage levels without mentioning how they are achieved. It's identical to other parts specification that surely miss internal bias. Didn't yet check mentioned dev kit schematic. - 2026-01-27
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