How can the EMIF Debug Toolkit support multiple Intel Agilex® 7 FPGA EMIF Interfaces? - How can the EMIF Debug Toolkit support multiple Intel Agilex® 7 FPGA EMIF Interfaces? Description In the Intel® Quartus® Prime Pro Edition Software version 20.2 and later, the EMIF Debug Toolkit can support multiple EMIF Interfaces in the same or different rows by following the guidelines in the "Configuring a Design to Use the Toolkit" section in the External Memory Interfaces Intel Agilex® FPGA IP User Guide . Also, please ensure all the IPs are added to one .qsys file. Note: USB-Blaster II should be used when using the EMIF Debug Toolkit. Resolution Custom Fields values: ['novalue'] Troubleshooting 1508377899 False ['External Memory Interfaces Debug Component IP', 'Memory Interfaces and Controllers'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 20.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']