Why does the Intel® Stratix® 10 E-Tile device transceiver not transmit or receive data after dynamic reconfiguration using the E-Tile Native PHY IP Embedded Streamer to load a new configuration profile? - Why does the Intel® Stratix® 10 E-Tile device transceiver not transmit or receive data after dynamic reconfiguration using the E-Tile Native PHY IP Embedded Streamer to load a new configuration profile? Description Due to a problem in Intel Quartus® Prime Pro Edition Software versions 18.1 to 19.1, the E-Tile transceiver MIF files may not be updated after pressing the Generate HDL button in the E-Tile Native PHY IP Parameter Editor. You may see one or more of the following symptoms in your design as a result of this problem. The MIF streamer status bit (0x40141[0]) may remain stuck high instead of pulsing high. The MIF streamer status bit (0x40141[0]) may never pulse high. The transceiver is incorrectly configured resulting in unexpected transmit and/or receive behavior. Resolution To work around this problem you can follow the sequence below. 1) Delete the E-tile Native PHY IP instance <ip_name> directory. 2) Open the E-tile Native PHY IP instance <ip_name>.ip Parameter Editor and generate the HDL. 3) Recompile the design. This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 19.2 Custom Fields values: ['novalue'] Troubleshooting 1409333750 False ['Stratix® 10 E-Tile Transceiver Native PHY'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.2 18.1 ['Stratix® 10 MX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']