NativeLink Simulation of DDR2, DDR3, and LPDDR2 Interfaces Fails for ModelSim AE and ModelSim SE - NativeLink Simulation of DDR2, DDR3, and LPDDR2 Interfaces Fails for ModelSim AE and ModelSim SE
Description This problem affects DDR2, DDR3, and LPDDR2 products. When you attempt to simulate a DDR2, DDR3, or LPDDR2 design using NativeLink with ModelSim or ModelSim-Altera, NativeLink fails and reports a parameter not found error. Resolution The workaround for this issue is to open the generated .do script found in the ...simulation/modelsim directory in a text editor, and change the following code: vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L arriav_ver -L arriav_hssi_ver -L arriav_pcie_hip_ver -L rtl_work -L work -voptargs=" acc" dut_example_sim� to the following code: vsim -t 1ps -L rtl_work -L work -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L arriav_ver -L arriav_hssi_ver -L arriav_pcie_hip_ver -voptargs=" acc" dut_example_sim� This issue will not be fixed.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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12.1
['Programmable Logic Devices']
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['novalue']
['novalue'] - 2021-08-25
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