Why do link partners report errors when connected to the F-Tile PMA/FEC Direct PHY FPGA IP variant with the Datapath clocking mode parameter is set to PMA, the PMA width parameter set to 16 and the Enable TX double width transfer parameter is unselected? - Why do link partners report errors when connected to the F-Tile PMA/FEC Direct PHY FPGA IP variant with the Datapath clocking mode parameter is set to PMA, the PMA width parameter set to 16 and the Enable TX double width transfer parameter is unselected? Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.3 and later, link partner devices might report bit errors when connected to the F-Tile PMA/FEC Direct PHY FPGA IP variants where the Datapath clocking mode parameter is set to PMA , the PMA width parameter set to 16 and the Enable TX double width transfer parameter is unselected? Resolution There is no workaround for this problem. This problem has been fixed starting in version 24.3 of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 18035772745 False ['F-Tile PMA/FEC Direct PHY IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.3 23.3 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']