Arria V and Cyclone V Soft Controllers May Not Meet Frequency Targets if CSR or ECC Enabled - Arria V and Cyclone V Soft Controllers May Not Meet Frequency Targets if CSR or ECC Enabled Description This problem affects DDR2, DDR3, and LPDDR2 products. The Arria V and Cyclone V soft controllers may not be capable of reaching the frequency targets calculated by the External Memory Interface Spec Estimator if you have turned on the Enable Configuration and Status Register Interface or Enable Error Detection and Correction options on the Controller Settings tab in the parameter editor. Resolution The workaround for this issue is to ensure that the Enable Configuration and Status Register Interface and Enable Error Detection and Correction options are not turned on. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.0 ['Arria® V FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']