How should I manage the TAG field for Non-Posted accesses with PCIe Avalon Memory-Mapped (Avalon-MM) interface? - How should I manage the TAG field for Non-Posted accesses with PCIe Avalon Memory-Mapped (Avalon-MM) interface? Description The Hard IP for PCI Express® with Avalon-MM interface requires the TAG field to be set as shown below for Non-Posted accesses. TAG = 0x00 - 0x07 : Txs Slave Port TAG = 0x08 - 0x0F : Reserved TAG = 0x10 - 0x1F : CRA Slave Port For Posted accesses, there is no requirement. Custom Fields values: ['novalue'] Troubleshooting novalue False ['PCI Express'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']