Internal Error: Sub-system: CDB_SGATE, File: /quartus/db/cdb_sgate/cdb_sgate_component.cpp, Line: 931 - Internal Error: Sub-system: CDB_SGATE, File: /quartus/db/cdb_sgate/cdb_sgate_component.cpp, Line: 931 Description Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.3 and earlier, you may see the above internal error when you use different port type in the Top level block design (.bdf) file and the HDL (.v/.vhd) file. For example, In HDL file, tridata is declared as of type OUTPUT entity Tri8 is port( <Input_enable> :in std_logic; <Input_port> :in std_logic_vector(7 downto 0); <Output_data> :out std_logic_vector(7 downto 0) ); end Tri8; Whereas in .bdf file, the tridata is used as type BIDIR. Resolution To work around this problem, fix the design so that both the HDL file and the .bdf file have the same port type for port specified. This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition software version 19.4 Custom Fields values: ['novalue'] Troubleshooting 1507444559 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.4 19.3 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']