Why does the P-tile Avalon® Streaming IP for PCI Express* Design Example testbench fail to simulate correctly in the supported Aldec* Riviera-PRO* 22.4 or later versions? - Why does the P-tile Avalon® Streaming IP for PCI Express* Design Example testbench fail to simulate correctly in the supported Aldec* Riviera-PRO* 22.4 or later versions? Description Due to a compatibility problem between version 22.3 and later of the Quartus® Prime Software and the Aldec* Riviera-PRO* 2022.4, 2022.4 tool, simulation of the P-tile Avalon® Streaming IP for PCI Express* Design Example testbench will fail with the following errors: # ELAB2: Fatal Error: ELAB2_0036 Unresolved hierarchical reference to "mqdma_avst_pio_test./0/" from module "pcie_ed_tb.dut_pcie_tb.dut_pcie_tb.g_bfm.p_dut_ep.altpcietb_bfm_top_rp.g_bfm.genblk1.rp.inst.apps.g_root_port.genblk1.drvr" (module not found). # ELAB2: Last instance before error: /pcie_ed_tb/dut_pcie_tb/dut_pcie_tb/g_bfm/p_dut_ep/altpcietb_bfm_top_rp/g_bfm/genblk1/rp/inst/apps/g_root_port/genblk1/drvr # KERNEL: Error: E8005 : Kernel process initialization failed. # ELAB2: Fatal Error: ELAB2_0036 Unresolved hierarchical reference to "mqdma_avst_pio_test./0/" from module "pcie_ed_tb.dut_pcie_tb.dut_pcie_tb.g_bfm.p_dut_ep.altpcietb_bfm_top_rp.g_bfm.genblk1.rp.inst.apps.g_root_port.genblk1.drvr" (module not found). # ELAB2: Last instance before error: /pcie_ed_tb/dut_pcie_tb/dut_pcie_tb/g_bfm/p_dut_ep/altpcietb_bfm_top_rp/g_bfm/genblk1/rp/inst/apps/g_root_port/genblk1/drvr # Test execution timed out! (/tmp/arc_641673711/_0/regtest/ip/altera_pcie/qsys_s10_itf/itf_main/device__1SX065HH1F35E1VG/qsys__g3x16_avmm_bas/rtl_sim_riviera_vlg/.reg_run/tmon)” Resolution To work around this problem, simulate the design using Aldec* Riviera-PRO* 2023.10. Custom Fields values: ['novalue'] Troubleshooting 14017975725 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.1 22.4 ['Stratix® 10 DX FPGA'] ['novalue'] ['novalue'] ['novalue']