Does the Stratix family provide controlled on-chip termination? - Does the Stratix family provide controlled on-chip termination? Description Yes, the Stratix family provides controlled, on-chip termination for the following: Driver impedance matching (LVTTL, LVCMOS) Driver series termination (SSTL3, SSTL2) Parallel near-end termination (HSTL2, GTL, GTL ) Parallel far-end termination (SSTL, HSTLI, GTL, GTL , CTT) Differential far-end termination (LVDS only) Two pins per I/O bank are tied to reference resistors. Specifically, RUP/RDN connect through resistance to VCC/GND . Custom Fields values: ['novalue'] Troubleshooting novalue False ['I O'] ['novalue'] novalue novalue ['Stratix® FPGAs'] ['novalue'] ['novalue'] ['novalue']