Why does the PWRMGT_SCL signal get stuck low during configuration of SmartVID (-V) Intel® Stratix® 10 devices operating in PMBus Slave mode? - Why does the PWRMGT_SCL signal get stuck low during configuration of SmartVID (-V) Intel® Stratix® 10 devices operating in PMBus Slave mode? Description You may see the PWRMGT_SCL signal get stuck low during the configuration of a SmartVID (-V) Intel® Stratix® 10 device operating in PMBus Slave mode if the PMBus Master has started the ARA flow before the PWRMGT_ALERT signal has been asserted (driven low) by the Intel Stratix 10 device. Resolution Do not start the ARA flow until after the Intel® Stratix® 10 device has asserted the PWRMGT_ALERT signal. Refer to the Intel® Stratix® 10 Power Management User Guide for the recommended flow. Custom Fields values: ['novalue'] Troubleshooting 1809174247 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 19.2 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']