Stratix V Hard IP for PCI Express Issue If rx_st_mask Toggles when rx_st_ready Is 0 - Stratix V Hard IP for PCI Express Issue If rx_st_mask Toggles when rx_st_ready Is 0
Description The Stratix V Hard IP for PCI Express IP Core may send invalid data if rx_st_mask toggles while rx_st_ready is 0. The Hard IP may not recover once this event occurs. Resolution There is not a workaround. Altera recommends that you disable the rx_st_mask signal for Stratix V devices.
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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12.0.1
['Stratix® V FPGAs']
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['novalue'] - 2021-08-25
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