Why is the Worst-Case MTBF not calculated for the nodes {*|soft_logics|rst_ctrl|pld_clk_ninit_done_sync_inst|din_s1}? - Why is the Worst-Case MTBF not calculated for the nodes {*|soft_logics|rst_ctrl|pld_clk_ninit_done_sync_inst|din_s1}? Description Due to a problem with the Quartus® Prime Pro Edition software version 25.1 and earlier, the "Worst-Case MTBF" is not calculated for the nodes { *|soft_logics|rst_ctrl|pld_clk_ninit_done_sync_inst|din_s1 } and results in "n/a (no valid slack)" by Timing Analyzer. This problem affects all designs containing the P-Tile PCIe FPGA IP. Resolution A patch is available to fix this problem in the Quartus® Prime Pro Edition software version 25.1. Download and install patch 0.06 from the following links: Download patch 0.06 for Windows (quartus-25.1-0.06-windows.exe) Download patch 0.06 for Linux (quartus-25.1-0.06-linux.run) Download the Readme for patch 0.06 (quartus-25.1-0.06-readme.txt) A patch is available to fix this problem in the Quartus® Prime Pro Edition software version 24.3.1. Download and install patch 1.21 from the following links: Download patch 1.21 for Windows (quartus-24.3.1-1.21-windows.exe) Download patch 1.21 for Linux (quartus-24.3.1-1.21-linux.run) Download the Readme for patch 1.21 (quartus-24.3.1-1.21-readme.txt) This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition software. Custom Fields values: ['novalue'] Troubleshooting 15012967369 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 23.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']