Why can't I access the Intel® Arria® 10 device through the JTAG interface when using Active Serial configuration mode? - Why can't I access the Intel® Arria® 10 device through the JTAG interface when using Active Serial configuration mode? Description If the EPCQ-L configuration device has been programmed with a corrupted image or an incorrect programming file, Active Serial configuration will fail, and you will observe the nSTATUS pin on the Intel® Arria® 10 device toggling during configuration. Attempting to configure the Intel® Arria® 10 device with a corrupted bit-stream will cause unexpected behavior, making the JTAG port inaccessible. Resolution To unlock the Intel® Arria® 10 device due to the corrupted configuration image, you need to shift the CONFIG_IO instruction continuously to re-access the JTAG port. The CONFIG_IO instruction will halt the Active Serial configuration process, thus making the JTAG port accessible. A consistent, valid IDCODE value should also be read out. You can use the Jam STAPL file to issue the CONFIG_IO instruction into the Intel® Arria® 10 device. The a10_unbrick.jam file will issue the CONFIG_IO instruction 30 times, followed by the IDCODE instruction. To execute the jam file using quartus_jli, use the following command: quartus_jli -c<cable> -aCONFIG_IO a10_unbrick.jam Once executed, you should observe a valid IDCODE value being read out, which indicates the JTAG port is now accessible. Then reprogram the EPCQ-L device with a valid configuration image. Custom Fields values: ['novalue'] Troubleshooting NA False ['novalue'] ['novalue'] novalue novalue ['Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']