Compilation Fails for UniPHY External Memory Interfaces if Synthesis Fileset is Mixed with Example Project Files - Compilation Fails for UniPHY External Memory Interfaces if Synthesis Fileset is Mixed with Example Project Files Description Compilation fails if the Files list in the Settings dialog box in the Quartus II software includes files from both the example project located at < working_dir >/< variation_name > _example_design_fileset/example_project / and the synthesis fileset located at < working_dir >/< variation_name >. Resolution A workaround for this issue is to perform the following steps: In an editor, open the < variation_name >_ driver.sv file, located in the < working_dir >/< variation_name >_ example_design_fileset/example_project/ directory In the < variation_name >_ driver.sv file, change the entity name� < variation_name >_ reset_sync to < variation_name >_< num >_ reset_sync , where num � is the same value as in the < variation_name >_< num >_ reset_sync.v filename in the < working_dir >/< variation_name >/ directory. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 11.0 10.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']