RapidIO II IP Core Handles Incoming Back-to-Back restart-from-retry and start-of-packet Control Symbols in Wrong Order - RapidIO II IP Core Handles Incoming Back-to-Back restart-from-retry and start-of-packet Control Symbols in Wrong Order Description If a RapidIO II IP core receives an incoming restart-from-retry control symbol immediately followed by a start-of-packet control symbol, the IP core processes these control symbols in the wrong order. As a result, the IP core does not recognize the following end-of-packet control symbol as legitimate. When the end-of-packet control symbol arrives, the IP core enters the Input Error state and sends a packet-not-accepted control symbol to the RapidIO link partner. Although the IP core recovers through the normal error recovery process, the recovery process takes time. Therefore, this issue causes lost bandwidth. Resolution This issue has no workaround. This issue will be fixed in a future version of the RapidIO II IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']