Why are the PTP statistics registers showing incorrect values after reset using the F-Tile Ethernet FPGA Hard IP with PTP enabled? - Why are the PTP statistics registers showing incorrect values after reset using the F-Tile Ethernet FPGA Hard IP with PTP enabled? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.2 and later, when using the F-Tile Ethernet FPGA Hard IP with PTP enabled, the following registers might get reset to "1" instead of "0" after PTP statistics are cleared. tx_total_ptp_pkts tx_total_1step_ptp_pkts tx_total_2step_ptp_pkts tx_total_v1_ptp_pkts tx_total_v2_ptp_pkts rx_total_ptp_ts Resolution There is no fix for this problem. Custom Fields values: ['novalue'] Errata 14023089475, 16024747034 False ['F-Tile Ethernet Hard IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 24.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']