Why does HPS GMII to RGMII Adapter FPGA IP have hold time violation on Agilex™ 5 designs? - Why does HPS GMII to RGMII Adapter FPGA IP have hold time violation on Agilex™ 5 designs? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, the HPS GMII to RGMII Adapter IP timing analyzer will report hold timing violation for designs targeting Agilex™ 5 designs. Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 24.1. Download and install Patch 0.19 from the following links: Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Windows (.exe) Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 for Linux (.run) Readme for Quartus™ Prime Pro Edition Software v24.1 Patch 0.19 (.txt) This problem is scheduled to be fix in a future release of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 14021950419 False ['HPS GMII to RGMII Converter IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.2 24.1 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']