Introduction to Optimizing FPGAs with the oneAPI Toolkits - 42 Minutes In this training you will learn to identify the bottlenecks present and what is responsible for them in your DPC++ code from the optimization report generated by the compiler. You will learn about the various optimization techniques for FPGAs using the oneAPI® product especially memory optimization techniques and loop optimization techniques which are the very common methods for optimization. Course Objectives At course completion, you will be able to: Identify bottlenecks in your design Find the cause of bottlenecks in your design Prepare kernels for the compiler to perform loop optimization Prepare kernels for the compiler to perform memory optimization Skills Required Knowledge of C++ language If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OONEAPIP2. FPGA_OONEAPIP2. <p>Introduction to Optimizing FPGAs with the Altera oneAPI Toolkits</p>